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| MC68VZ328P/D Rev. 1, 10/2001 MC68VZ328 MC68VZ328 (DragonBallTM VZ) Integrated Portable System Processor Product Brief The MC68VZ328 (DragonBall VZ) microprocessor, the third generation of the DragonBallTM family of products, is designed to save time, power, and cost in the design and operation of new products. DragonBall VZ requires less board space and allows for reduced pin count and fewer programming steps in designing your product. The major differences between previous versions of DragonBall processors and the new VZ product are system-speed improvement and SDRAM support. All these features combine to make the MC68VZ328 the microprocessor of choice among many system designers. Its functionality and glue logic are all optimally connected, timed with the same clock, fully tested, and uniformly documented. Also, only the essential signals are brought out to the pins. The MC68VZ328's primary package consists of TQFP and MBGA, designed to occupy the smallest possible footprint on your board. Although the DragonBall VZ is the integrated processor of choice for some of the most popular PDA designs, it can be used in a wide variety of applications including exercise monitors, navigation systems, and smart phones. Figure 1 on page 2 shows a simplified block diagram of the MC68VZ328. This document contains information on a new product. Specifications and information herein are subject to change without notice. (c) Motorola, Inc., 2001. All rights reserved. /PB1CSB1/SDWE PB2/CSC0/RAS0 PB3/CSC1/RAS1 PB4/CSD0/CAS0 PB5/CSD1/CAS1 PM0/SDCLK PM1/SDCE PM2/DQMH PM3/DQML PM4/SDA10 PM5/DMOE PB6/TOUT/TIN VDD LVDD GND PORT F VOLTAGE REGULATOR PF2/CLKO SYSTEM INTEGRATION MODULE CSA0 PF7/CSA1 PB0/CSB0 PORT B PORT M PORT B BUSW/DTACK/PG0 LWE/LB UWE/UB OE PG1/A0 PK[2:1]/UDS,LDS,RW MA[15:0]/A[16:1] A[19:17] D[15:8] PORT A CHIP SELECT MEMORY CONTROLLER 8-/16-BIT 68000 BUS INTERFACE FLX68000 STATIC CORE 16-BIT TIMER 16-BIT TIMER 8/16-BIT PWM D[7:0]/PA[7:0] A[23:20]/PF[6:3] PORT F 68000 INTERNAL BUS CLOCK SYNTHESIZER AND POWER CONTROL REAL-TIME CLOCK M/S SPI WITH FIFO UART WITH IRDA1.0 EXTAL XTAL PD0/INT0 PD1/INT1 PD2/INT2 PD3/INT3 PD4/IRQ1 PD5/IRQ2 PD6/IRQ3 PD7/IRQ6 PF1/IRQ5 EMUIRQ/PG2 PG3/HIZ/P/D EMUCS/PG4 EMUBRK/PG5 PORTS D & F MASTER LCD CONTROLLER SPI UART INTERRUPT CONTROLLER PORTS C, F & K RESET PORT G PORT E PORT J & K PC[3:0]/LD[3:0] PK[7:4]/LD[7:4] PC4/LFLM PC5/LLP PC6/LCLK PC7/LACD PF0/LCONTRAST PE0/SPITXD PE1/SPIRXD PE2/SPICLK2 PE3/DWE/UCLK PJ0/MISO PJ1/MOSI PJ2/SPICLK1 PJ3/SS PK0/SPIRDY/PWMO2 PJ4/RXD2 PJ5TXD2 PJ6/RTS2 PJ7/CTS2 Figure 1. MC68VZ328 Simplified Block Diagram 2 MC68VZ328 Product Brief PE4/RXD1 PE5TXD1 PE6/RTS1 PE7/CTS1 PROCESSOR CONTROL, EMULATION AND BOOTSTRAP PB7/PWMO1 PORT E 1 * Features Static FLX68000 CPU--identical to MC68EC000 microprocessor -- Full compatibility with MC68000 and MC68EC000 -- 32-bit internal address bus -- Static design that allows processor clock to be stopped to provide power savings -- 5.4 MIPS performance at 33 MHz processor clock -- External M68000 bus interface with selectable bus sizing for 8-bit and 16-bit data ports * System Integration Module (SIM) incorporating many functions typically related to external array logic, reducing parts counts in design, with functions that include the following: -- System configuration and programmable address mapping -- Glueless interface to SRAM, DRAM, SDRAM, EPROM, and FLASH memory -- Eight programmable chip selects with wait state generation logic -- Four programmable interrupt I/Os, with keyboard interrupt capability -- Five general-purpose, programmable edge/level/polarity interrupt IRQs -- Other programmable I/O, multiplexed with peripheral functions of up to 47 parallel I/O lines -- Programmable interrupt vector response for on-chip peripheral modules -- Low-power mode control * Synchronous DRAM controller -- Support for CAS-before-RAS refresh cycles and self-refresh mode DRAM -- Support for 8-bit / 16-bit port DRAM -- EDO or Automatic Fast Page Mode for LCDC access -- Programmable refresh rate -- Support for up to two banks of DRAM / EDO DRAM -- Programmable column address size * * * * 76 general-purpose ports Two UART ports Two Serial Peripheral Interface (SPI) ports Two 16-bit general-purpose counters/timers -- Automatic interrupt generation -- 30 ns resolution at 33 MHz system clock -- Timer input/output pin * Real-time clock / sampling timer -- Separate power supply for the RTC -- One programmable alarm -- Capability of counting up to 512 days The features of the DragonBall VZ include the following: 3 -- Sampling timer with selectable frequency (4 Hz, 8 Hz, 16 Hz, 32 Hz, 64 Hz, 128 Hz, 256 Hz, 512 Hz) -- Interrupt generation for digitizer sampling or keyboard debouncing * LCD controller -- Software-programmable screen size (up to 640 x 480) to support single (non-split) monochrome panels -- Capability of directly driving popular LCD drivers/modules from Motorola, Sharp, Hitachi, Toshiba, and numerous other manufacturers -- Support for up to 16 gray levels out of 16 palettes -- Utilization of system memory as display memory -- LCD contrast control using 8-bit PWM * Two Pulse Width Modulation (PWM) modules -- Audio-effects support -- 16- and 8-bit resolution -- 5-byte FIFO that provides more flexibility on performance -- Sound and melody generation * Built-in emulation function -- Dedicated memory space for emulator debug monitor with chip select -- Dedicated interrupt (interrupt level 7) for ICE -- One address-signal comparator and one control-signal comparator, with masking to support single or multiple hardware execution -- Breakpoint -- One breakpoint instruction insertion unit * Boot Strap mode function -- Allows user to initialize system and download program/data to system memory through UART -- Accepts execution command to run program stored in system memory -- Provides an 8-byte-long instruction buffer for 68000 instruction storage and execution * Power management -- Fully static HCMOS technology -- Programmable clock synthesizer using 32.768 kHz / 38.4 kHz crystal for full frequency control -- Low-power stop capabilities -- Modules that can be individually shut down -- Operation from DC to 33 MHz (processor clock) -- Operating voltage of (3.0 10%) V -- Compact 144-lead Thin Quad Flat Pack (TQFP) and MAP BGA 4 MC68VZ328 Product Brief 2 DragonBall Series Table 1. DragonBall Series Comparison Feature CPU Chip Selects LCD Controller LCD Resolution Timer SPI PWM UART RTC PCMCIA 1.0 DRAM Controller GPIO Boot Strap Mode Speed Voltage Package DragonBall 68EC000 16 4 gray levels Up to 1024 * 512 2 * 16-bit Master and Slave DragonBall EZ 68EC000 8 16 gray levels Up to 640 * 512 1 * 16-bit Master DragonBall VZ Synthesizable 68000 8 16 gray levels Up to 640 * 480 2 * 16-bit Master and Config. Master/Slave 16-bit, 8-bit with FIFO UART 1 UART 2 512 day count No EDO/Fast Page DRAM Up to 76 Yes 33 MHz 3.0 V 10% 144 TQFP,144 MAP BGA The DragonBall VZ marks the third generation in the DragonBall series. Table 1 compares the new processor with previous versions. 16-bit UART 1 8-bit with FIFO UART 1 Yes Yes No Up to 78 No 16 MHz 3.3 V 10% 144 TQFP 512 day count No EDO/Fast Page DRAM Up to 54 Yes 16/20 MHZ 3.3 V 10% 100 TQFP,144 MAP BGA 5 Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. "Typical" parameters which may be provided in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer. MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. (c) Motorola, Inc. 2001. How to reach us: USA/EUROPE/Locations Not Listed: Motorola Literature Distribution; P.O. Box 5405, Denver, Colorado, 80217. 1-303-675-2140 or 1-800-441-2447 JAPAN: Motorola Japan Ltd.; SPS, Technical Information Center, 3-20-1, Minami-Azabu, Minato-ku, Tokyo 106-8573 Japan. 81-3-3440-3569 ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd., Silicon Harbour Centre, 2 Dai King Street, Tai Po Industrial Estate, Tai Po, N.T., Hong Kong. 852-26668334 Technical Information Center: 1-800-521-6274 HOME PAGE: http://www.motorola.com/semiconductors/ MC68VZ328P/D |
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